In recent years the use of digital signal processing apparatus to implement medium and high speed modems has become very popular. Digital signal processing offers a less expensive way to implement such modems when compared to older techniques employing analog circuitry. Most medium and high speed modems encode information into changes in phase or changes in phase and amplitude between successive keyings of the transmitter (baud times). Naturally, the more bits which are encoded per baud time, the more complex the phase/amplitude constellation for the transmission becomes.
As the complexity of the encoded constellation increases, the allowable margin for error for phase detecting apparatus of the receiving modem decreases. Additionally, in most popular data transmission arrangements used in modems throughout the world, modems which transmit at speeds in excess of 1200 bits per second normally include multiple points in the encoding constellation which are at the same phase but of different amplitudes. Therefore, the amplitude distortion which is tolerable in such modems is limited.
Digital signal processing has been particularly useful in implementing such modems because of the relatively high cost of precision analog components necessary to construct circuits in the transmission path, particularly filters with minimal phase distortion over the bandwidth of interest.
Additionally, the use in digital signal processing schemes in such modems overcomes the severe problems of component value changes which accompany complex analog filters, including changes which are a function of ambient temperature and drift which occurs over time.
Most digital signal processing schemes for medium to high speed modems in the prior art have been straight forward implementations of the results of conventional digital signal processing theory. This is known to those skilled in the art: as a general first approximation, the greater the highest frequency of interest in a digital signal processing system, the more complex the system becomes. In general, as the Q of filters used in such a system increases, and the frequency of the signals being operated upon increases, the bit length of the digital filters and the processing time required for the filter operations increase. This has led to rather complex implementation of medium and high speed modems employing digital signal processing.
More recently; microprocessors, such as the TMS32010 currently manufactured by Texas Instruments Corporation, which are specifically designed to handle digital signal processing chores have become available. Such processors have an architecture and instruction set particularly suited for these jobs, including the ability to perform a relatively large number of multiply operations in a relatively short period of time. Naturally, in implementing a modem employing digital signal processing, all the digital signal processing necessary must be executed in real time . Additionally, if the designer simply implements the conventional teachings with respect to use of dedicated digital signal processing microprocessors, such as the TMS32010, and the control schemes normally used to provide the intelligence of an intelligent modem, implementation of such a scheme in the environment of an intelligent modem, for example one of the type system of large memory requirements and inefficient shown in U.S. Pat. No. 4,431,867, will lead to a system of large memory requirements and inefficient use of some of the system resources. Thus, there is a need in the field of medium to high speed modems employing digital signal processing to provide a system which makes the maximum use of available resources, and in particular does not unnecessarily duplicate memory implementations to service both the memory needs of the digital signal processing apparatus and the processor implementing the normal intelligent functions of an intelligent modem.
Furthermore, there is a need for efficient and less complex implementation of the required digital signal processing functions which take advantage of the fact that only discrete phase/amplitude points are of interest in the ultimate transfer of, information in a system employing such modems. Additionally, there is a need for the simplest possible circuit topology which can do the job required and take advantage of the power of a dedicated digital signal processor (DSP) such as the TMS32010.
In view of the relative power of an outboard DSP microprocessor and the available processing power of a conventional microprocessor used to implement the other intelligent functions of a modem, there is a need to maximize the use of the conventional microprocessor in constructing such a modem and minimize the complexity of the circuitry necessary to interconnect these components of the system. It is therefore desirable to design an implementation of a modem which allows the collection of the majority of this additional circuitry into a single specialized integrated circuit such as a gate array.
The preferred embodiment of the invention disclosed herein is one which is designed to implement standard V0.22/V0.22 bis of the CCITT. As is known to those skilled in the art, the 2400 bit per second mode of the V0.22/V0.22 bis modem is 600 baud, 4 bits per baud, using 1200 and 2400 Hz carriers for the originate and answer modes, respectively. Prior art designs of a transmit pulse shaping digital filter for such a modem require a transmit filter to be implemented with a string of registers of a given length to handle the 2400 Hz carrier. However, since the signal characteristic near the center of a baud time is the only truly critical result in transmitting the signal for such a modem, the inventors of the present invention have discovered that it is possible to dynamically change coefficients at the taps on the filter in order to implement the same transfer function in a smaller device.
Additionally, the phase/amplitude constellation employed in this type of modem employs only two discrete amplitudes along a radial vector drawn from the origin of the phase plane. Therefore, it has been discovered that it is only necessary to employ two bits to represent the amplitude value for such a signal, providing for two positive amplitude values and two negative amplitude values.
Additionally, conventional digital signal processing schemes for such modems have adopted two, or one relatively complex multiple frequency digital signal generator to transmit the two carriers required for originate and answer modes. It is desirable to provide a system in which a single carrier frequency is provided, using a constant sampling frequency which allows changing only the transmit filter characteristics in order to select between the carriers used for originate and answer modes.
Also, as is known to those skilled in the art, modems of this type often employ mu-law codecs as the analog-to-digital and digital-to-analog converters. Mu-law codecs employ nonlinear amplitude transfer functions in order to provide amplitude compression. It is therefore necessary, when transmitting, to eventually convert the linear phase-and-amplitude modulated digital signal into a mu-law digital signal. Prior art schemes for converting the linear signal into a mu-law signal have tended to be complex and require significant processor time and memory storage. Therefore, there is a need for a simpler' linear-to-mu law conversion process which is usable in the environment of a modem.
Conventional modems using digital signal processing circuits have employed conventional digital phase-locking techniques which tend to converge slowly. Additionally, quick phase-locking for baud clock recovery is desirable in a V0.22/V0.22 bis modem. Lastly, it is very common in modems to employ automatic gain control so that the digital signal processing apparatus can adequately detect incoming signals of relative weakness. Prior art modems employ conventional automatic gain circuitry in which the error signal used to determine amplification of the incoming signal is directly proportional to the difference between a predetermined desired amplitude and the amplitude of the incoming signal. Because of the relatively high speed of information transfer in a 600 baud modem, it is necessary for the automatic gain control (AGC) circuits to have relatively fast attack and release times in order to track variable magnitude signals coming through the telephone network. The use of fast attack AGC circuits necessarily means that such circuits tend to be underdamped in order to achieve the fast attack time characteristic. This, in turn, has led to a common problem with AGC circuits in conventional modems of error bursts as a result of sudden drops in amplitude of the incoming signal. The inventors of the present invention have discovered that such error bursts often result not from the inability to detect low level signals, as might be expected, but rather from the fact that the AGC circuits overshoot the final needed amplification factor, which causes the detector to be unable to detect and decode incoming data until the underdamped AGC circuit settles to a final value.
Therefore, there is a need in the art of modem employing DSP to provide an improved AGC circuit which will implement the necessary fast attack to retain the input signal at an acceptable level which will not overshoot in response to a relatively sudden drop in incoming signal amplitude. A typical handshake sequence comprises a repeating sequence of predetermined characters. A typical handshake sequence detector will monitor an incoming data stream for the repeating sequence and indicate that the handshake sequence has been detected if the repeating sequence occurs for at least a specified minimum time. However, an error condition, such as noise, can alter the incoming data stream so that one or more of the incoming character is changed. In this case, the incoming data stream will not consist only of the repeating sequence of predetermined characters but will also have one or more erroneous characters. The typical handshake sequence detector will detect the erroneous characters as a break in the repeating sequence and temporarily indicate that the handshake sequence is not being detected.
Therefore, there is a need for a handshake sequence detector which can tolerate an occasional error condition in the handshake sequence and still correctly indicate that the handshake sequence is present.
Furthermore, conventional methods for converting a phase shift keyed signal into a demodulated data stream required substantial computing power. Therefore, there is a need for a simpler technique for converting a phase shift keyed signal into a demodulated data stream which can be monitored for the presence of the handshake sequence.